M.Sc. Javier Acevedo

PhD Researcher

Javier Acevedo (Student Member, IEEE). He is currently a Scientific Staff and working toward the Ph.D. degree with the Telekom Chair of Communication Networks, Technische Universität Dresden. His particular focus is in the design and implementation of hardware accelerators for low-latency applications applied to the Tactile Internet and RAN.

Contact

Phone: +49 351 463-32234
Email: javier.acevedo@tu-dresden.de

Research Interest

  • Hardware-based virtualization of 5G’s Radio Access Networks (RAN).
  • Software Defined Radios.
  • Channel Estimation for Industrial IoT. MPSoC and DSP open source ARA core implementation.
  • Hardware-based Acceleration of Random Linear Network Coding. MPSoC and DSP implementation.

Teaching

Communication Networks 2 – Software Defined Radios 2020. Theoretical and practical tutorials.

Problem-based Learning 2022.

Supervision

I’ve had the pleasure to work with the following students during my stay at ComNets:

Problem-based Learning – Yixin Yuan

Studienarbeit Elektrotechnik – Florian Grabs

Scientific reviews

  • European Wireless Conference 2021 (3x)
  • IEEE Access (1x)
  • IEEE Wireless Communication magazine

 

Publications

13 entries « 2 of 2 »

2020

Acevedo, Javier; Ulbricht, Marian; You, Dongho

Integrating Software-Defined Radios Book Chapter

In: Fitzek, Frank H. P.; Granelli, Fabrizio; Seeling, Patrick (Ed.): Computing in Communication Networks – From Theory to Practice, vol. 1, Chapter 26, pp. 437-452, Elsevier, 1, 2020, (https://cn.ifn.et.tu-dresden.de/compcombook/).

BibTeX

2018

Gabriel, Frank; Acevedo, Javier; Fitzek, Frank H. P.

Network Coding on Wireless Multipath for Tactile Internet with Latency and Resilience Requirements Proceedings Article

In: 2018 IEEE Global Communications Conference: Selected Areas in Communications: Tactile Internet (Globecom2018 SAC TI), 2018.

Abstract | BibTeX

Acevedo, Javier; Scheffel, Robert; Wunderlich, Simon; Hasler, Mattis; Pandi, Sreekrishna; Cabrera, Juan A.; Fitzek, Frank H. P.; Fettweis, Gerhard P.; Reisslein, Martin

Hardware Acceleration for RLNC: A Case Study Based on the Xtensa Processor with Tensilica Instruction-set Extension Journal Article

In: MDPI Electronics, 2018, ISSN: 2079-9292.

BibTeX

13 entries « 2 of 2 »